Microelectromechanical systems (MEMS) devices like Texas Instruments DLP® digital micromirror devices (DMDs) use an array of individually positionable mirrors to form images for projection onto a display surface. Micromechanical components of the mirror array are fabricated over a substrate containing CMOS circuitry for addressing and controlling the positioning of the mirrors. Information regarding the fabrication of such devices is given in L. J. Hornbeck, “Digital Light Processing for High-Brightness, High Resolution Applications”, Proc. SPIE vol. 3013, pp. 27-40, Projection Displays III, February 1997 and C. Gong & T. Hogan, “CMOS Compatible Fabrication Processes for the Digital Micromirror Device”, IEEE J. Electron Devices, vol. 2, no. 3, pp. 27-32, May 2014, the entireties of both of which are incorporated herein by reference.
FIG. 1 (Prior Art) shows a cross-sectional image of DMD MEMS device 100 fabricated according to a process such as that described by Gong et. al. FIG. 1 illustrates the interconnections of mirror and hinge layers through hinge and mirror support vias to the underlying CMOS structure. Device 100 comprises a micromechanical component portion 102 above a CMOS portion 104. Substrate 106 comprises SRAM cell transistors 108 and other circuit elements for data loading and voltage application for mirror positioning.
A first dielectric layer 110 is formed above transistors 108. A first metal (M1) layer 112 is formed and patterned above the first dielectric layer 110. A second dielectric layer 114 is formed and patterned above the M1 layer 112. A second metal (M2) layer 116 is formed and patterned above the second dielectric layer 114. A third dielectric layer 118 is deposited and patterned above the M2 layer 116. A third metal (M3) layer 120 is formed and patterned above the third dielectric layer 118.
A spacer layer 122, typically a photoresist material, is deposited above the third metal layer 120. The spacer layer 122 is sacrificial and removed in a later step. Hinge vias 124 are patterned within the spacer layer 122. A hinge metal is deposited above the spacer layer 122 to form the hinge 126 and within the hinge vias 124 to form the walls of the hinge vias 128. Another spacer layer 130, typically a photoresist material, is deposited above the hinge 126. The spacer layer 130 is sacrificial and will be removed in a later process. A mirror via 132 is patterned within the spacer layer 130 and a mirror metal is deposited above the spacer layer 130 and within the mirror via 132 to form a mirror 134. The mirror via 132 may remain partially unfilled after mirror metal 134 deposition and a central indentation 136 may remain within the reflective mirror surface above the mirror via 132. After processing is completed a plasma ash undercut process removes the sacrificial spacer layers.
A developer solution such as tetramethyl ammonium hydroxide is used in the photolithography patterning steps to remove the exposed photoresist. This developer solution is required for pattern formation.
FIG. 2 (Prior Art) shows a top-down image of a device 200 comprising mirrors 202.
The develop process results in a residue 204 formed within spaces 206 separating individual mirrors 202. The residue 204 is an organo-metallic and can interfere with undercut processes. It may also cause discoloration across the device and the hinge torque, and result in image quality defects for the DMD.
It is possible that formation of the residue 204 occurs when titanium atoms are dislodged from the exposed hinge metal 126 during the develop process and are transported from the bottom of the mirror via to the top of the spacer layer 130. Titanium atoms interact with the spacer layer 130 and mirror metal, an aluminum alloy, to form the residue 204. The residue 204 acts as a block against reactants during etching processes and sacrificial spacer layers may be non-uniformly removed.
The photolithography used in this process is 365 nm (i-line). i-line photolithography is typical in semiconductor manufacturing and has been extensively studied and tested. Experiments have shown that varying other typical photoresists used for this process does not address formation of the residue 204.
FIG. 3 (Prior Art) shows a top-down image of an array 300 of mirrors 302. An organo-metallic residue 304 can be seen over multiple areas of the array 300. The residue 304 is visible as a light discoloration in spaces between individual mirrors 302. The residue 304 is of greater significance as dimensions of the mirror 302 decrease and residue 304 is deposited across a larger number of mirrors 302 within the same surface area. The residue 304 prevents optimal undercut of the mirrors 302 for removing spacer layers and for releasing hinges and mirrors 302. The residue 304 occurs randomly across a substrate. Device performance, contrast, and reliability can be negatively affected.
FIGS. 4A and 4B (Prior Art) describe the formation of a residue above a portion 400 of the mirror 302.
In FIG. 4A, a hinge metal 402 is formed above a spacer layer 404, typically a photoresist. A spacer layer 406, typically a photoresist, is formed above the hinge metal 402 and patterned to form a mirror via 408. After patterning of the via 408, the top surface 412 of the hinge metal 402 is exposed. During the develop process, titanium atoms migrate from the top surface 412 to the top surface 410 of the spacer layer 406.
FIG. 4B shows the portion 400 once a residue has formed. The residue forms a layer 414 on the top surface 410 of the layer 406. A mirror metal 416 is formed above the spacer layer 406 and the layer 414. The layer 414 prevents removal of the spacer layer 406 for releasing the mirror.